Maximizing Throughput in Low-K Dielectric Deposition
October 5, 2021
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In semiconductor manufacturing, low-κ dielectric deposition is a common process – but requires frequent process chamber cleans, to remove the build-up of deposition condensates.
Traditionally, the chamber clean cycle has been a fixed time process step, with sufficient margin to account for statistical variations – effectively, a worst-case estimate. Instead, if the endpoint of the cleaning process were detected, this time could be cut – and overall throughput improved dramatically.
Existing metrology solutions using residual gas analyzers (RGAs) or optical emission spectroscopy (OES) are ineffective. Nitrogen trifluoride (NF3) used for chamber cleaning is highly corrosive to RGA electron impact ionization sources (making them impractical) and OES requires a plasma that’s not present during cleaning.
Atonarp’s Aston takes a new approach, with precise endpoint detection, to reduce processing time without compromising process margins. Aston has been successfully deployed in low-κ dielectric deposition applications.
In a recent on-tool, in-FAB production study, Aston reduced the overall chamber clean cycle by up to 80%. This cut total wafer deposition / chamber clean cycle time by more than 40%, for a five-wafer cycle.
Aston's ability to generate pinpoint real-time data helps to overcome the problems with existing metrology solutions, to enable precise endpoint detection and thus reduce processing time dramatically.
Learn more about Aston and download our Application Brief below for more details on how Aston reduces chamber clean cycle time in semiconductor manufacturing.
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